1. Field of the Invention
This invention relates to a data processor, more particularly, to a data processor which easily and optionally extends an address space comprised of a user area and a supervisor area by providing the supervisor area with a memory protective function, i.e., two-level memory protective functions, in the actual storage environment.
2. Description of the Prior Art
FIG. 1 is a schematic diagram of the address space of a conventional data processor which is provided with memory having addresses on a 1-byte basis, where these addresses respectively have a certain address space expressed by unsigned binary notation expressing absoluteness. Address values of address space shown in FIG. 1 are expressed by the digit notation.
FIG. 1 denotes in its right-side a practical system that has both the supervisor area and the user area extended when the address space of a data processor is extended to 64 bits. The address space containing 4 giga-bytes denoted by unsigned 32-bit binary notation (shown to the left) is discretely provided to the supervisor area which substantially corresponds to the upper 2 giga bytes made available for the supervisor as well as the user area which substantially corresponds to the lower 2 giga bytes made available for the user. When employing the above constitution, either the supervisor or the user can use the user area, whereas only the supervisor is allowed to use the supervisor area in order to securely protect memory. A technique which protects memory by dividing memory into a plurality of address space based on an idea similar to that shown in FIG. 1 is described in "VAX Architecture Handbook", Section 7, compiled by Education Department, Japan Digital Equipment Co., Ltd.
As shown in FIG. 1, if the address space expressed by unsigned binary notation is divided into the supervisor area and the user area, when extending the address space, the user area is split into two parts in the manner of sandwiching the supervisor area. This makes it quite difficult for any conventional data processor to extend the address space.
Furthermore, since in any conventional data processor, all the supervisor areas are present in teh address space having large values, when directly designating any address in the supervisor area, a longer code length is needed for designating specific addresses.